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automotive power data sheet rev. 1.4, 2013-07-02 tle 8110 ee smart multichannel low si de switch with parallel control and spi interface coreflex TLE8110EE
data sheet 2 rev. 1.4, 2013-07-02 tle 8110 ee smart multichannel switch table of content table of content 1 overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.1 description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3 pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 3.1 pin assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 3.2 pin definitions and functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 3.3 terms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 4 general product characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 4.1 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 4.2 functional range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 4.3 thermal resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 5 power supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 5.1 description power supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 5.2 electrical characteristics po wer supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 6 reset and enable inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 6.1 description reset and enable inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 6.2 electrical characteristics reset inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 7 power outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 7.1 description power outp uts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 7.2 description of the clamping structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 7.3 electrical characteristics power outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 7.4 parallel connection of the power stages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 8 diagnosis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 8.1 diagnosis description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 8.1.1 open load diagnosis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 8.1.2 overcurrent / overtemperature diagnosis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 8.2 electrical characteristics diagnosis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 9 parallel inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 9.1 description parallel in puts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 9.2 electrical characteristics pa rallel inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 10 protection functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 10.1 electrical characteristics overload protection function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 11 16 bit spi interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 1 11.1 description 16 bit spi interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 11.2 timing diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 11.3 electrical characteristics 16 bit spi interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 12 control of the device . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 12.1 internal clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 12.2 spi interface. signals and protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 12.2.1 description 16 bit spi interface signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 12.2.2 daisy chain . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 12.2.3 spi protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 12.2.3.1 16-bit protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 12.2.3.2 2x8-bit protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 12.2.3.3 16- and 2x8-bit protocol mixed. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
tle 8110 ee smart multichannel switch table of content data sheet 3 rev. 1.4, 2013-07-02 12.2.3.4 daisy-chain and 2x8-bit protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 12.2.4 safecommunication . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 12.2.4.1 encoding of the commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 12.2.4.2 modulo-8 counter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 12.3 register and command - overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 12.3.1 cmd - commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 12.3.1.1 cmd_rsd - command: return short diagnosis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56 12.3.1.2 cmd_rsds - command: re turn short diagnosis and device status . . . . . . . . . . . . . . . . . . . . 57 12.3.1.3 cmd_rpc - command: return pattern check . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 12.3.1.4 cmd_rinx - command: re turn input pin (inx) -status . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 12.3.2 dcc - diagnosis registers and compactcontrol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62 12.3.2.1 drx - diagnosis registers contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65 12.3.2.2 drx - return on drx commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66 12.3.2.3 dmsx/opsx - diagnosis mode set / output pin set co mmands . . . . . . . . . . . . . . . . . . . . . . . . 66 12.3.3 outx - output control register chx . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68 12.3.4 isx - input or serial mode control register, bank a and bank b . . . . . . . . . . . . . . . . . . . . . . . . . 69 12.3.5 pmx - parallel mode register chx . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 12.3.6 devs - device se ttings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 13 package outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72 14 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
pg-dso-36 type package marking TLE8110EE pg-dso-36 TLE8110EE data sheet 4 rev. 1.4, 2013-07-02 smart multichannel low side switch with parallel control and spi interface coreflex TLE8110EE 1overview features ? overvoltage, overtemperature, esd -protection ? direct parallel pwm control of all channels ?safe communication (spi and parallel) ? efficient communication mode: compact control ? compatible with 3.3v- and 5v- micro controllers i/o ports ?clamp safe for highly efficient parallel use of the channels ? green product (rohs compliant) ? aec qualified application ? power switch automotive and industrial system s switching solenoids, relays and resistive loads description 10-channel low-side switch in smart power technology [spt] with s erial p eripheral i nterface [spi] and 10 open drain dmos output stages. the TLE8110EE is protected by embedded protection functions and designed for automotive and industrial applications. the output stages are controlled via parallel input pins for pwm use or spi interface. the TLE8110EE is particularly suitable for engine management and powertrain systems.
tle 8110 ee smart multichannel switch overview data sheet 5 rev. 1.4, 2013-07-02 figure 1 block diagram TLE8110EE table 1 product summary parameter symbol value unit analogue supply voltage v dd 4.50 ? 5.50 v digital supply voltage v cc 3.00 ? 5.50 v clamping voltage (ch 1-10) v ds(cl)typ 55 v on resistance typical at tj=25c and i dnom r on1-4 0.30 r on5-6 0.25 r on7-10 0.60 on resistance maximum at tj=150c and i dnom r on1-4 0.60 r on5-6 0.50 r on7-10 1.20 nominal output current (ch 1-4) i dnom 1.50 a nominal output current (ch 5-6) i dnom 1.70 a nominal output current (ch 7-10) i dnom 0.75 a output current shut-down threshold (ch 1-4) min. i dsd(low) 2.60 a output current shut-down threshold (ch 5-6) min. i dsd(low) 3.70 a output current shut-down threshold (ch 7-10) min. i dsd(low) 1.70 a micro contr oller tle8110 ee i/o i/o in1 in10 spi _ si spi _si spi_ so spi _ so spi _ clk spi _ clk spi_ cs spi _ cs v dd = typ. 5v v cc = typ . 3. 3?.5 v rst supply ic v ba tt 4 to 6 injectors or solenoids general purpose channels in par allel connection general purpose channels for relays out1 out10 appl _ diag_ 10 ch_tle 8110 .vsd en i/o
data sheet 6 rev. 1.4, 2013-07-02 tle 8110 ee smart multichannel switch block diagram 2 block diagram figure 2 block diagram 2.1 description communication the TLE8110EE is a 10-channel lo w-side switch in pg-dso-36 pack age providing embedded protection functions. the 16-bit se rial peripheral interface (spi) can be utilized for control and diagnosis of the device and the loads. the spi interface provides da isy-chain capability in orde r to assemble multiple devices in one spi chain by using the same number of micro-controller pins 1) . the analogue and the digital part of the device is su pplied by 5v. logic input an d output signals are then compatible to 5v logic level [ttl - le vel]. optionally, the logic part can be supplied with lower voltages to achieve signal compatibility with e.g. 3. 3v logic level [cmos - level]. the TLE8110EE is equipped with 10 parallel input pins that are routed to each output channel. this allows control of the channels for loads driven by pulse width modulation (pwm). the output channels can also be controlled by spi. reset the device is equipped with one reset pin and one enable. reset [rst] serves the whole device, enable [en] serves only the output control unit and the power stages. 1) daisy chain block_diag_10ch_tle8110.vsd s_cs s_si s_clk s_ so spi (ttl or cmos) open load detection temperature sensor diagnosis register out4 out3 out2 out1 gate control short circuit detection input register vcc input control (ttl or cmos) in3 vdd rst out8 out7 out6 out5 out10 out9 short to gnd detection in4 in5 in6 in7 in8 in9 in10 in1 in2 control register logic control unit analogue control, diagnostic and protective functions en gnd
tle 8110 ee smart multichannel switch block diagram data sheet 7 rev. 1.4, 2013-07-02 diagnosis the device provides diagnosis of th e load, including open load, short to gnd as well as short circuit to v batt detection and over-load / over-temperature indication. the spi diagnosis flags indicates if latched fault conditions may have occurred. protection each output stage is protected against sh ort circuit. in case of over load, the affected channel is switched off. the switching off reaction time is dependent on two switching thresholds. restart of the channel is done by clearing the diagnosis register 1) . this feature protects the device against uncontrolled repetitive short circuits. the reaction to a short-circuit and over-temperature can be al ternatively changed to further modes, such as semi- or auto - restart of the affected channel. there is a temperature sensor available for each channel to protect the device in case of over temperature. in case of over temperature the affected channel is switched of f and the over-temperature flag is set. restart of the channel is done by deleting the flag. this feature protec ts the device against uncontrolled temperature toggling. parallel connection of channels the device is featured with a centra l clamping structure, so-called clamp safe. this feature ensures a balanced clamping between the channels and allows in case of paralle l connection of channels a high efficient usage of the channel capabilities. this parallel mode is additionally featur ed by best possible paramet er- and thermal matching of the channels and by controlling the ch annels accordingly. 1) restart after clear
data sheet 8 rev. 1.4, 2013-07-02 tle 8110 ee smart multichannel switch pin configuration 3 pin configuration 3.1 pin assignment figure 3 pin configuration 3.2 pin definitions and functions pin symbol function 1 gnd ground 2 p_in1 parallel input pin 1. default assignment to output channel 1. 3 p_in2 parallel input pin 2. default assignment to output channel 2. 4 en enable input pin. if not needed, connect with pull-up resistor to vcc. 5rst reset input pin. (low active ). if not needed, connect with pull-up resistor to vcc. 6 p_in3 parallel input pin 3. default assignment to output channel 3. 7 p_in4 parallel input pin 4. default assignment to output channel 4. 8 vdd analogue supply voltage 9 p_in5 parallel input pin 5. default assignment to output channel 5. 10 vcc digital supply voltage 11 s_so serial peripheral interface [spi], serial output 12 s_clk serial peripheral in terface [spi], clock input 13 s_cs serial peripheral interface [sp i], chip select (active low) 14 s_si serial peripheral interface [spi], serial input 15 p_in6 parallel input pin 6. default assignment to output channel 6. 16 p_in7 parallel input pin 7. default assignment to output channel 7. 17 p_in8 parallel input pin 8. default assignment to output channel 8. 18 gnd ground 1 2 3 4 5 6 7 8 9 10 12 13 14 15 16 17 18 36 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 11 35 gnd p_in1 p_in2 en rst p_in3 p_in4 vdd p_in5 vcc s_so s_clk s_cs s_si p_in6 p_in7 p_in8 gnd gnd out7 out8 n.c. gnd out5 out1 out2 p_in10 p_in9 out3 out4 out6 gnd n.c. out10 out9 gnd heat-slug /exposed pad (back-side) gnd
tle 8110 ee smart multichannel switch pin configuration data sheet 9 rev. 1.4, 2013-07-02 19 gnd ground 20 out9 drain of power transistor channel 9 21 out10 drain of power transistor channel 10 22 n.c. internally not conn ected, connect to ground 23 gnd ground 24 out6 drain of power transistor channel 6 25 out4 drain of power transistor channel 4 26 out3 drain of power transistor channel 3 27 p_in9 parallel input pin 9. default assignment to output channel 9. 28 p_in10 parallel input pin 10. default assignment to output channel 10. 29 out2 drain of power transistor channel 2 30 out1 drain of power transistor channel 1 31 out5 drain of power transistor channel 5 32 gnd ground 33 n.c. internally not conn ected, connect to ground 34 out8 drain of power transistor channel 8 35 out7 drain of power transistor channel 7 36 gnd ground cooling tab gnd cooling tab; internally connected to gnd pin symbol function
data sheet 10 rev. 1.4, 2013-07-02 tle 8110 ee smart multichannel switch pin configuration 3.3 terms figure 4 terms terms_tle8110.vsd v p_in2 v rst v p_in3 v p_in4 v vdd v p_in5 v vcc v s_so v s_clk v s_cs v s_si v p_in7 v out7 v p_in9 v out3 v batt i out1 i out4 i out2 i p_in10 i p_in9 i out3 i p_in2 i rst i s_si i p_in7 i p_in3 i p_in4 i vdd i p_in5 i vcc i s_so i s_clk i s_cs 1 2 3 4 5 6 7 8 9 10 12 13 14 15 16 17 18 36 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 11 35 pg-dso-36 gnd p_in1 p_in2 en rst p_in3 p_in4 vdd p_in5 vcc s_so s_clk s_cs s_si p_in6 p_in7 p_in8 gnd gnd out7 out8 n.c. gnd out5 out1 out2 p_in10 p_in9 out3 out4 out6 gnd n.c. out10 out9 gnd i p_in1 i en i p_in6 i p_in8 v p_in1 v en v p_in6 v p_in8 i out7 i out8 i out5 i out6 i out10 i out9 v out8 v out5 v out1 v out2 v p_in10 v out4 v out6 v out10 v out9 top view heat- slug / exposed pad (back-side) gnd
tle 8110 ee smart multichannel switch general product characteristics data sheet 11 rev. 1.4, 2013-07-02 4 general product characteristics 4.1 absolute maximum ratings absolute maximum ratings 1) t j = -40 c to +150 c; all voltages with respect to gro und, positive curren t flowing into pin (unless otherwise specified) pos. parameter symbol limit values unit conditions min. max. supply voltages 4.1.1 digital supply voltage v cc -0.3 5.5 v permanent 4.1.2 digital supply voltage v cc -0.3 6.2 v t < 10s 4.1.3 analogue supply voltage v dd -0.3 5.5 v permanent 4.1.4 analogue supply voltage v dd -0.3 6.2 v t < 10s power stages 4.1.5 load current (ch 1 to 10 ) i dn -i dsd(low) a? 4.1.6 reverse current output (ch 1-10) i dn -i dsd(low) -a? 4.1.7 total ground current i gnd -20 20 a ? 4.1.8 continuous drain source voltage (channel 1 to 10) v dsn -0.3 45 v ? 4.1.9 maximum voltage for short circuit protection on output v dsn - 24 v one event on one single channel. clamping energy - single pulse 2)3) 4.1.10 single clamping energy channel group 1-4 e as -29mj i d = 2.6a 1 single pulse 4.1.11 single clamping energy channel group 5-6 e as -31mj i d = 3.7a 1 single pulse 4.1.12 single clamping energy channel group 7-10 e as -11mj i d = 1.7a 1 single pulse logic pins (spi, inn, en, rst) 4.1.13 input voltage at all logic pin v x -0.3 5.5 v permanent 4.1.14 input voltage at all logic pin v x -0.3 6.2 v t < 10s 4.1.15 input voltage at pin 27, 28 (in9, 10, ) v x -0.3 45 v permanent temperatures 4.1.16 junction temperature t j -40 150 c? 4.1.17 junction temperature t j -40 175 c max. 100hrs cumulative 4.1.18 storage temperature t stg -55 150 c? esd robustness 4.1.19 electro static discharge voltage ?human body model - hbm? v esd -4 4 kv all pins hbm 4) 1.5kohm, 100pf
data sheet 12 rev. 1.4, 2013-07-02 tle 8110 ee smart multichannel switch general product characteristics note: stresses above the ones listed here may cause perm anent damage to the device. exposure to absolute maximum rating conditions for extended periods may affect device reliability. note: integrated protection functions are designed to prevent ic destruction under fault conditions described in the data sheet. fault conditions are considered as ?outside? normal operating range. protection functions are not designed for continuous repetitive operation. 4.2 functional range note: within the functional range the ic operates as de scribed in the circuit description. the electrical characteristics are specifi ed within the conditions given in the re lated electrical ch aracteristics table. 4.1.20 electro static discharge voltage ?charged device model - cdm? v esd -500 500 v all pins cdm 5) 4.1.21 electro static discharge voltage ?charged device model - cdm? v esd -750 750 v pin 1, 18, 19, 36 (corner pins) cdm 5) 1) not subject to production test, specified by design. 2) one single channel per time. 3) triangular pulse shape (inductance discharge): i d (t) = i d (0) (1 - t / t pulse ); 0 < t < t pulse . 4) esd susceptibility, hbm acco rding to eia/jesd 22-a114-b 5) esd susceptibility, charged devi ce model ?cdm? eia/jesd22-c101-c pos. parameter symbol limit values unit conditions min. max. supply voltages 4.2.1 analogue supply voltage v dd 4.5 5.5 v ? 4.2.2 digital supply voltage v cc 3 v dd v? 4.2.3 digital supply voltage v cc v dd 5.5 v leakage currents (i cc ) might increase if v cc > v dd . power stages 4.2.4 ground current i gnd_typ 9 a resistive loads 1) 1) not subject to production test, specified by design. temperatures 4.2.5 junction temperature t j -40 150 c- 4.2.6 junction temperature t j -40 175 c 1) for 100hrs absolute maximum ratings 1) (cont?d) t j = -40 c to +150 c; all voltages with respect to gro und, positive curren t flowing into pin (unless otherwise specified) pos. parameter symbol limit values unit conditions min. max.
tle 8110 ee smart multichannel switch general product characteristics data sheet 13 rev. 1.4, 2013-07-02 4.3 thermal resistance figure 5 pg-dso-36 pcb set-up pos. parameter symbol limit values unit conditions min. typ. max. 4.3.1 junction to soldering point r thjsp - 1.75 3.60 k/w p vtot = 3w 1)2)3) 1) not subject to production test, specified by design. 2) homogenous power distribution over all channels (all power stages equally heated), dependent on cooling set-up. 3) refer to figure 5 4.3.2 junction to ambient r thja - 25.00 - k/w p vtot = 3w 1)2)3) metallization: dimensions : thermal vias : rth pcb setup.vsd 1.5mm 35m, 90% metallization 70m modeled (traces) 35m, 90% metallization 70m, 5% metallization 76.2 x 114.3 x 1.5 mm 3 , fr4 jedec 2s2p (jesd 51-7) + (jesd 51-5) =0.3 mm ; plating 25 m; 24 pcs. for pg-dso-36
data sheet 14 rev. 1.4, 2013-07-02 tle 8110 ee smart multichannel switch power supply 5 power supply 5.1 description power supply the TLE8110EE is supplied by analogue power supply line v dd which is used for the analogue functions of the device, such as the gate control of the pow er stages. the digital power supply line v cc is used to supply the digital part and offers the possib ility to adapt the logic level of the seri al output pins to lower logic levels. figure 6 block diagram supply and reset description supply the supply voltage pins are monitored during the power- on phase and under normal operating conditions for under voltage. if during power-on the increasing supply voltage exceeds the supply power-on switching threshold, the internal reset is released after an internal delay has expired. in case of under voltage, a device internal reset is perf ormed. the switching threshold for this case is the power- on switching threshold minu s the switching hysteresis. in case of under voltage on the analogue supply line v dd the outputs are turned off but the content of the registers and the functionality of the logic part is kept aliv e. in case of under voltage on the digital supply v cc line, a complete reset including the registers is performed. after returning back to normal supply voltage and an internal delay, the related functional blocks are turned on again. for more details, refer to the chapter ?reset?. the device internal under-voltage set will set the related bi ts in sds (short diagnosis an d device status) to allow the micro controller to detect this re set. for more inform ation, refer to the chapte r ?control of the device?. block_diag_supply_reset.vsd input and serial inter- face fault detection gate control diagnosis register input register vdd vcc rst outx control register logic control unit en gnd vcc under voltage monitor vdd under voltage monitor or or analogue control, diagnostic and protective functions
tle 8110 ee smart multichannel switch power supply data sheet 15 rev. 1.4, 2013-07-02 5.2 electrical charact eristics power supply electrical characteristics: power supply 3.0v < v cc < 5.5v; 4.5v < v dd < 5.5v, t j = -40 c to +150 c, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) pos. parameter symbol limit values unit conditions min. typ. max. digital supply and power-on reset 5.2.1 digital supply voltage v cc 3- 5.5v 5.2.2 a) b) digital supply current during reset (v cc < v ccpo ) i ccstb -1520af sclk = 0hz, s_cs = v cc , tj=85c 1) v cc = 2.0v v dd > v cc -2040af sclk = 0hz, s_cs = v cc , tj=150c v cc = 2.0v v dd > v cc 5.2.3 a) b) digital supply current during reset ( v rst < v rstl ) i ccstb - 25af sclk = 0hz, s_cs = v cc , tj=85c 1) v dd > v cc -515af sclk = 0hz, s_cs = v cc , tj=150c v dd > v cc 5.2.4 a) b) digital supply operating current v cc = 3.3v i cc -0.152maf sclk = 0hz, tj=150c. all channels on 1) -0.55maf sclk = 5mhz, tj=150c. all channels on 1)2) 5.2.5 a) b) digital supply operating current v cc = 5.5v i cc -0.252maf sclk = 0hz, tj=150c. all channels on -0.810maf sclk = 5mhz, tj=150c. all channels on 1)2) 5.2.6 digital supply power-on switching threshold v ccpo 1.9 2.8 3 v v cc increasing 5.2.7 digital supply switching hysteresis v cchy 100 300 500 mv 1)
data sheet 16 rev. 1.4, 2013-07-02 tle 8110 ee smart multichannel switch power supply analogue supply and power-on reset 5.2.8 analogue supply voltage v dd 4.5- 5.5v - 5.2.9 a) b) analogue supply current during reset (v dd < v ddpo ) i ddstb -1020af sclk = 0hz, tj=85c 1) v dd = 2v -1540af sclk = 0hz, tj=150c v dd = 2v 5.2.10 a) b) analogue supply current during reset ( v en < v enl ) i ddstb - 15af sclk = 0hz, tj=85c 1) -215af sclk = 0hz, tj=150c 5.2.11 analogue supply operating current i dd -825maf sclk = 0...5mhz 1) tj=150c all channels on 5.2.12 analogue supply power-on switching threshold v ddpo 34.24.5v v dd increasing 5.2.13 analogue supply switching hysteresis v ddhy 100 200 400 mv 1) 5.2.14 analogue supply power-on delay time t vddpo - 100 200 s v dd increasing 1) 1) parameter not subject to produ ction test. specified by design. 2) c = 50pf connected to s_so electrical characteristics: power supply 3.0v < v cc < 5.5v; 4.5v < v dd < 5.5v, t j = -40 c to +150 c, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) pos. parameter symbol limit values unit conditions min. typ. max.
tle 8110 ee smart multichannel switch reset and enable inputs data sheet 17 rev. 1.4, 2013-07-02 6 reset and enable inputs 6.1 description reset and enable inputs the TLE8110EE contains one reset- and one enable input pin as can be seen in figure 6 . description: reset pin [rst ] is the main reset and acts as the internal under voltage reset monitoring of the digital supply voltage v cc : as soon as rst is pulled low, the whole device in cluding the control registers is reset. the enable pin [en] resets only the output channels an d the control circuits. the content of the all registers is kept. this functions offers th e possibility of a ?soft? rese t turning off only th e output lines but keeping alive the spi communication and the contents of the control registers. this allows the read out of the diagnosis and setting up the device during or directly after reset. 6.2 electrical charact eristics reset inputs electrical characteristics: reset inputs 3.0v < v cc < 5.5v; 4.5v < v dd < 5.5v, t j = -40 c to +150 c, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) pos. parameter symbol limit values unit conditions min. typ. max. reset input pin [rst ] 6.2.1 low level of rst v rstl -0.3 - v cc *0.2 v - 6.2.2 high level of rst v rsth v cc *0.4 - v cc v- 6.2.3 rst switching hysteresis v rsthy 20 100 300 mv 1) 1) parameter not subject to produ ction test. specified by design. 6.2.4 reset pin pull-down current i rstresh 20 40 85 a v rst =5v i rstresl 2.4 - - a v rst =0.6v 1) 6.2.5 required reset duration time rst t rstmin 2-- s 1) enable input pin [en] 6.2.6 low level of en v enl -0.3 - v cc *0.2 v - 6.2.7 high level of en v enh v cc *0.4 - v cc v- 6.2.8 en switching hysteresis v enhy 20 60 300 mv 1) 6.2.9 enable pin pull-down current i enresh 53585av en =5v i enresl 2.4 - - a v en =0.6v 1) 6.2.10 enable reaction time (reaction of outx) t enrr -4- s 1) 6.2.11 required enable duration time en t enmin 2-- s 1)
data sheet 18 rev. 1.4, 2013-07-02 tle 8110 ee smart multichannel switch reset and enable inputs figure 7 timing v dd outx t en r r t t enable of output device operating t enable valid t vddpo v en t< t en min v en h v en l v en h y external _ reset. vsd outx off device on device off enable not valid
tle 8110 ee smart multichannel switch power outputs data sheet 19 rev. 1.4, 2013-07-02 7 power outputs 7.1 description power outputs the TLE8110EE is a 10 channel low-si de powertrain switch. the power stages are built by n-channel power mosfet transistors. the device is a universal multich annel switch but mostly suited for the use in engine management systems [ems]. within an ems, the be st fit of the channels to the typical loads is: ? channel 1 to 4 for injector valves or mid-sized so lenoids with a nominal current requirement of 1.5a. ? channel 5 to 6 for mid-sized solenoids or injector valves with a nominal current requirement of 1.7a ? channel 7 to 10 for small sole noids or relays with a nominal current requirement of 0.75a channel 1 to 10 provide e nhanced clamping capabilities of typically 55 v best suited for indu ctive loads such as injectors and valves. it is recommended in case of an inductive load, to connect an external free wheeling- or clamping diode, where-ever possible to reduce power dissipation. all channels can be connected in parallel. channels 1 to 4, 5 to 6 and 7 to 10 are prepared by matching for parallel connection with the possibility to use a high portion of the capability of each single channel al so in parallel mode (refer to chapter 7.4 ). channel 5 and 6 have a higher current shut down threshold to allow to connect in parallel mode a load with a high inrush-current, such as a lambda sensor heater. figure 8 block diagram of control and power outputs block _diag_10ch_tle8x10_outputs.vsd open load detection temperature sensor diagnosis register out4 out3 out2 out1 gate control ch1 short circuit detection input register in3 vdd rst out8 out7 out6 out5 out10 out9 short to gnd detection inx in1 in2 control register en gnd vcc gate control ch2 serial and parallel input contr ol ( for details , see chapter ?control of the device? )
data sheet 20 rev. 1.4, 2013-07-02 tle 8110 ee smart multichannel switch power outputs 7.2 description of th e clamping structure when switching off inductive loads, the potential at pin out rises to v ds(cl) potential, because the inductance intends to continue driving the current. the clamping vo ltage is necessary to prevent destruction of the device, see figure 9 for the clamping circuit principle. nevertheless, the maximum allowed load inductance is limited. figure 9 internal clamping principle clamping energy during demagnetization of inductive loads, energy ha s to be dissipated in the device. this energy can be calculated with following equation: (1) the maximum energy, which is converted into heat, is limited by the therma l design of the component. attention: it is strongly recommended to measure the load energy and current under operating conditions, example of measur ement setup is shown in figure 10 . load small-signal parameters might not reflect the real load behavior under operating conditions, see figure 11 . for more details please refer to the application note ?switching inductive loads?. figure 10 e cl measurement setup v bat i d v dscl out v ds gnd l , r l outputclam p.vsd ev ds cl () l l r l ----- - i l v ds cl () v bat ? r l -------------------- ----------------- 1 r l i ? l v ds cl () v bat ? -------------------- ----------------- + ?? ?? ln ? ? ?? = low-side switch v bat ctrl load measurement setup dmos active clamping v cl gnd v d ( t ) i l ( t ) inductive load r l l l out temperature chamber t = t l oscilloscope
tle 8110 ee smart multichannel switch power outputs data sheet 21 rev. 1.4, 2013-07-02 figure 11 deviation of calculation from measurement 7.3 electrical character istics power outputs electrical characteristics: power outputs 3.0v < v cc < 5.5v; 4.5v < v dd < 5.5v, t j = -40 c to +150 c, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) pos. parameter symbol limit values unit conditions min. typ. max. output channel resistance 7.3.1 on state resistance channel group 1-4 r dson -0.3-ohm i dnom =1,5a; tj=25c 1) - 0.45 0.6 ohm i dnom =1,5a; tj=150c 7.3.2 on state resistance channel group 5-6 r dson - 0.25 - ohm i dnom =1.7a; tj=25c 1) - 0.35 0.5 ohm i dnom =1.7a; tj=150c 7.3.3 on state resistance channel group 7-10 r dson -0.6-ohm i dnom =0.75a; tj=25c 1) - 0.85 1.2 ohm i dnom =0.75a; tj=150c deviation from measured values on off ctrl v d , i l t t v d i l e clm e cl measured calculated l-saturation effect r-temp. effect t f v cl v bat v on i l i lm t fm 0 on off ctrl v d , i l t t v d i l e clm e cl measured calculated -increase effect r-temp. effect t f v cl v bat v on i l i lm t fm 0 increasing inductance with i l (relays and some valve types) decreasing inductance with i l (injectors, valves)
data sheet 22 rev. 1.4, 2013-07-02 tle 8110 ee smart multichannel switch power outputs clamping energy - repetitive 1) 2)3)4) channel group 1-4 7.3.4 repetitive clamping energy e ar --11mj i d = 1.0a 10 9 cycles --12mj i d = 2.1a 10 4 cycles --15mj i d = 2.6a 10 cycles 5) channel 5-6 7.3.5 repetitive clamping energy e ar --13mj i d = 1.3a 10 9 cycles --15mj i d = 2.7a 10 4 cycles --20mj i d = 3.2a 10 cycles 5) channel 7-10 7.3.6 repetitive clamping energy e ar --4mj i d = 0.7a 10 9 cycles --4mj i d = 1.4a 10 4 cycles --5mj i d = 1.7a 10 cycles 5) leakage current 7.3.7 output leakage current in standby mode, channel 1 to 4 i doff --3av ds =13.5v; v dd =5v, tj=85c 1) --8av ds =13.5v; v dd =5v, tj=150c 7.3.8 output leakage current in standby mode, channel 5 to 6 i doff --6av ds =13.5v; v dd =5v, tj=85c 1) --12av ds =13.5v; v dd =5v, tj=150c 7.3.9 output leakage current in standby mode, channel 7 to 10 i doff --2av ds =13.5v; v dd =5v, tj=85c 1) --5av ds =13.5v; v dd =5v, tj=150c electrical characteristics: power outputs (cont?d) 3.0v < v cc < 5.5v; 4.5v < v dd < 5.5v, t j = -40 c to +150 c, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) pos. parameter symbol limit values unit conditions min. typ. max.
tle 8110 ee smart multichannel switch power outputs data sheet 23 rev. 1.4, 2013-07-02 clamping voltage 7.3.10 output clamping voltage, channel 1 to 10 v dscl 45 55 60 v timing 7.3.11 output switching frequency f outx - - 20 khz 1) resistive load duty cycle > 25%. 7.3.12 turn-on time t don -510sv ds =20% of v batt v batt = 13.5v, i ds1 to i ds6 = 1a, i ds7 to i ds10 = 0.5a, resistive load 7.3.13 turn-off time t doff -510sv ds =80% of v batt v batt = 13.5v, i ds1 to i ds6 = 1a, i ds7 to i ds10 = 0.5a resistive load 1) parameter is not subject to production test, specified by design. 2) either one of the values has to be considered as worst ca se limitation. cumulative scenario and wide range of operating conditions are treated in the application note ?switching inductive loads - tle8110 addendum?. 3) this lifetime statement is an anticipati on based on an extrapolation of infineon's q ualification test resu lts. the actual lif etime of a component depends on its form of application and type of use etc. and may deviate from such statement. the lifetime statement shall in no event extend the agreed warranty period. 4) triangular pulse shape (inductance discharge): i d (t) = i d (0) (1 - t / t pulse ); 0 < t < t pulse . 5) repetitive operation not allowed. starting t j must be kept within specs. in case of high energy pulse an immediate switch- off strategy is recommended electrical characteristics: power outputs (cont?d) 3.0v < v cc < 5.5v; 4.5v < v dd < 5.5v, t j = -40 c to +150 c, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) pos. parameter symbol limit values unit conditions min. typ. max.
data sheet 24 rev. 1.4, 2013-07-02 tle 8110 ee smart multichannel switch power outputs figure 12 ch 1-4: typical behavior of rds_on versus the junction temperature tj figure 13 ch 5-6: typical behavior of rds_on versus the junction temperature tj -40-20 0 20406080100120140 0,2 0,3 0,4 0,5 0,6 tj/c rds_on / ohm ron_vs_tj_ch1-4,6.vsd r ds_on vs. t j : ch 1-4 (v dd =5v) -40-200 20406080100120140 0,1 0,2 0,3 0,4 0,5 tj/c rds_on / ohm ron_vs_tj_ch5-6.vsd r ds_on vs. t j : ch 5-6 (v dd =5v)
tle 8110 ee smart multichannel switch power outputs data sheet 25 rev. 1.4, 2013-07-02 figure 14 ch7-10: typical behavior of rds_on versus the junction temperature tj figure 15 all channels: typical behavior of the clamping voltage versus the junction temperature -40 -20 0 20 40 60 80 100 120 140 0.4 0.6 0.8 1.0 1.2 tj/c rds_on / ohm ron_vs_tj_ch7-10.vsd r ds_on vs. t j : ch 7-10 (v dd =5v) -40-20 0 20406080100120140 53 54 55 56 57 tj/c vcl / v vcl_vs_tj_all_ch.vsd v cln vs. t j : all channels
data sheet 26 rev. 1.4, 2013-07-02 tle 8110 ee smart multichannel switch power outputs figure 16 timing of output channe l switching (res istive load) 7.4 parallel connection of the power stages the TLE8110EE is equipped with a struct ure which improves the capability of parallel-connected channels. the device can be ?informed? via the pmx.pmx - bits (see c hapter control of the device) which of the channels are connected in parallel. the input channels can be mapp ed to the parallel connected output channels in order to apply the pwm signals. this feature allows a flexible adaptation to different lo ad situations within the same hardware setup. in case of overload the ground current and the power di ssipation is increasing. the application has to take into account that all maximum ratings are observed (e.g. operating temperature t j and total ground current i gnd , see maximum ratings). in case of parallel connection of c hannels with or w/o pm-bit set, the defined maximum clamping energy must not be exceeded. all stages are switched on and off simultaneously. the c has to ensure that the st ages which are connected in parallel have always the same state (on or off). the pm-b it should be set according to the parallel connected power stages in order to achieve the best possible performance. the pm-bit is set to its default value in case of a rese t event (reset pin low or at digital supply undervoltage), that means the improved parallel mode is no longer active. in the event of reset the channels will be switched off causing the clamping energy to be di ssipated with low performance of the cu rrent sharing as without pm-bit set, for more details please refer to the application note switching inductive lo ads - tle8110 addendum . the performance during parallel connection of channels is specified by design and not subject to the production test. all channels at the same junction temperature level. on-resistance the typical on-resistance r dssum(typ) of parallel connected channels is given by: (2) timing_ power_ outx _res1 .vsd t t v in x v outx v in h v in h v batt t don t doff 80% 20 % r dssum typ () 1 r dson n typ () , ---------------- ------------ - 1 r dson n 1 typ () + , ------------------- ---------------- - + 1 ? =
tle 8110 ee smart multichannel switch power outputs data sheet 27 rev. 1.4, 2013-07-02 table 2 performance 1)2)3)4) in case of parallel connection of channels: related pm-bit set 1) the performance during parallel connection of channels is specified by design and not subject to the production test. 2) homogenous power distribution over all channels (all power stages equally heated), dep endent on cooling set-up. 3) this lifetime statement is an anticipati on based on an extrapolation of infineon's q ualification test resu lts. the actual lif etime of a component depends on its form of application and type of use etc. and may deviate from such statement. the lifetime statement shall in no event extend the agreed warranty period. 4) triangular pulse shape (inductance discharge): i d (t) = i d (0) (1 - t / t pulse ); 0 < t < t pulse . pos. parameter symbol channels in parallel unit conditions 2x 3x 4x channel group 1-4 7.4.1 maximum overall current before reaching lower limit threshold i dsum(low) 5.1 7.6 10.1 a 1) 7.4.2 maximum overall repetitive clamping energy e arsum 37--mj i d =1.0a 10 9 cycles 17 38 69 mj i d =1.75a 10 9 cycles - 2342mj i d =2.5a 10 9 cycles --33mj i d =3.0a 10 9 cycles channel group 5-6 7.4.3 maximum overall current before reaching lower limit threshold i dsum(low) 7.2--a 7.4.4 maximum overall repetitive clamping energy e arsum 43--mj i d =1.3a 10 9 cycles 21--mj i d =2.2a 10 9 cycles channel group 7-10 7.4.5 maximum overall current before reaching lower limit threshold i dsum(low) 3.3 5.0 6.6 a 7.4.6 maximum overall repetitive clamping energy e arsum 15--mj i d =0.7a 10 9 cycles 6 1530mj i d =1.2a 10 9 cycles -918mj i d =1.6a 10 9 cycles --11mj i d =2.1a 10 9 cycles
data sheet 28 rev. 1.4, 2013-07-02 tle 8110 ee smart multichannel switch power outputs table 3 performance 1)2)3)4) in case of parallel connection of channels: related pm-bit not set 1) the performance during parallel connection of channels is specified by design and not subject to the production test. 2) homogenous power distribution over all channels (all power stages equally heated), dep endent on cooling set-up. 3) this lifetime statement is an anticipati on based on an extrapolation of infineon's q ualification test resu lts. the actual lif etime of a component depends on its form of application and type of use etc. and may deviate from such statement. the lifetime statement shall in no event extend the agreed warranty period. 4) triangular pulse shape (inductance discharge): i d (t) = i d (0) (1 - t / t pulse ); 0 < t < t pulse . pos. parameter symbol channels in parallel unit conditions 2x 3x 4x channel group 1-4 7.4.1 maximum overall current before reaching lower limit threshold i dsum(low) 5.1 7.6 10.1 a 1) 7.4.2 maximum overall repetitive clamping energy e arsum 18--mj i d =1.0a 10 9 cycles 8 1319mj i d =1.75a 10 9 cycles -811mj i d =2.5a 10 9 cycles --9mj i d =3.0a 10 9 cycles channel group 5-6 7.4.3 maximum overall current before reaching lower limit threshold i dsum(low) 7.2--a 7.4.4 maximum overall repetitive clamping energy e arsum 22--mj i d =1.3a 10 9 cycles 11--mj i d =2.2a 10 9 cycles channel group 7-10 7.4.5 maximum overall current before reaching lower limit threshold i dsum(low) 3.3 5.0 6.6 a 7.4.6 maximum overall repetitive clamping energy e arsum 7--mj i d =0.7a 10 9 cycles 347mj i d =1.2a 10 9 cycles - 34mj i d =1.6a 10 9 cycles --3mj i d =2.1a 10 9 cycles
tle 8110 ee smart multichannel switch diagnosis data sheet 29 rev. 1.4, 2013-07-02 8 diagnosis 8.1 diagnosis description the TLE8110EE provides diagnosis information about the device and about the load. following diagnosis flags have been implemented for each channel: updating of the diagnosis is based on a filter-dependent standard delay time ( t d ) of 220s max. this value is set as a default. refer to figure 18 for details. if scg or ol condition is asserted and before the diagnosis delay time ( t d ) is elapsed a condition change occurs, ol-to-scg or scg-to-ol, filter timer is not reset and latest condition before t d expiration will be stored into the diagnosis register. ? application hint: it is recommended to avoid off periods of the channel shorter than t d(max) (220s) in order to ensure the filter time is expired and th e correct diagnosis information is stored. ? application hint: in specific application cases - such as driving uni-polar st epper motor - it might be possible, that reverse currents flow for a s hort time, which possibly can disturb the diagnosis circuit at neighboring channels and cause wrong diagnosis results of those chan nels. to reduce the possib ility, that this effect appears in a certain timing range, the filter time of chan nels 7 to 10 can be extended to typ. 2.5ms or typ. 5ms by setting the ?diagnosis blind time? - bits (dbtx). if channels 7 to 10 are used for driving loads causing reverse currents, they influence each other and additionally might affect channels 5 and 6 . it is recommended to use the channels 7 + 8 and 9 + 10 as pairs for anti-par allel control signals, such as for the stepper motors. for logic setting details, see chapter ?control of the device?. diagnosis 1) 1) no priority scheme is implemented for the diagnosis detecti on, any new diagnosis entry w ill override the previous one symbol drn[1:0]x 2) 2) diagnosis register (a/b banks) bit configuration, see chapter 12.3.2.1 device reaction confirmation procedure 3) 3) for some diagnosis a confirmation procedure is requ ired for a safe operation of the device, refer to figure 17 short to ground scg 00 b -- no fault ok 11 b -- open load ol 01 b - chapter 8.1.1 overcurrent / overtemperature oct 10 b switch-off of related channel chapter 8.1.2
data sheet 30 rev. 1.4, 2013-07-02 tle 8110 ee smart multichannel switch diagnosis 8.1.1 open load diagnosis if an ol is read out of the diagnosis register, the following procedure is required in order to confirm the channel status and ensure a safe operation of the device: after reading the ol [01 b ] in the diagnosis register ( chapter 12.3.2 ) 1. switch-off for t t d(max) the related channel (via serial or direct control, see chapter 12.3.3 and chapter 12.3.4 ) 2. read again the diagnosis register a) if ol is confirmed then take actions according to system implementation 3. continue normal operation refer to figure 17 for the procedure flow-chart. 8.1.2 overcurrent / over temperature diagnosis after an oct assertion the re lated channel is switched off for safety reasons. if an oct is read out of the diagnosis register, the following procedure is required in order to confirm the chan nel status and ensure a safe operation of the device: after reading the oct [10 b ] in the diagnosis register ( chapter 12.3.2 ) 1. set related bit devs.dccx = 0 to disable off-diagnosis, see chapter 12.3.6 2. clear the diagnosis issuing a dcc.drxcl command, see chapter 12.3.2 3. switch-on for t t offcl_l(max) the related channel 4. read again the diagnosis register a) if oct is confirmed then take acti ons according to sys tem implementation 5. set related bit devs.dccx = 1 to enable off-diagnosis 6. continue normal operation refer to figure 17 for the procedure flow-chart.
tle 8110 ee smart multichannel switch diagnosis data sheet 31 rev. 1.4, 2013-07-02 figure 17 diagnosis confirmation procedure figure 18 block diagram of diagnosis diagnosis confir mation ok ? scg ? take scg action yes no yes no ol ? yes no oct ? yes no devs.dccx=0 (disable off-diag) dcc.drxcl (clear diagnosis) dcc.drx (read diagnosis) devs.dccx=1 (enable off-diag) oct ? yes no take oct action take ol action dcc.drx (read diagnosis) no actions wait t d (max) with channel off ol ? yes no dcc.drx (read diagnosis) wait t offcl _l (max) with channel on outn i dspd latch v dd v dssg diagnosis-serial.vsd protective functions n n or diagnosis register mux 00 01 10 latch v dsol gate contr ol latch gnd i dssg temp. sensor
data sheet 32 rev. 1.4, 2013-07-02 tle 8110 ee smart multichannel switch diagnosis 8.2 electrical characteristics diagnosis electrical characteristics: diagnosis 3.0v < v cc < 5.5v; 4.5v < v dd < 5.5v, t j = -40 c to +150 c, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) pos. parameter symbol limit values unit conditions min. typ. max. open load diagnosis 8.2.1 open load detection threshold voltage v dsol 2.00 2.60 3.20 v - 8.2.2 output pull-down diagnosis current per channel (low level) i dpd 50 90 150 a v ds = 13.5 v 8.2.3 open load diagnosis delay time (all channels) t d 100 - 220 s devs.dbt1=0 devs.dbt2=1 or 0 8.2.4 a) b) channel 7-10: open load diagnosis delay time ?diagnosis blind time? see chapter ?control of the device? figure 19 , figure 20 t d 1.65 2.5 3.45 ms devs.dbt1=1 devs.dbt2=0 3.3 5 7.3 ms devs.dbt1=1 devs.dbt2=1 short to gnd diagnosis 8.2.5 short to ground detection threshold voltage v dssg 1.00 1.50 2.00 v - 8.2.6 output diagnosis current for short to ground per channel (low level) i dsg -150 -100 -50 a v ds = 0v 8.2.7 short to gnd diagnosis delay time t d 100 - 220 s devs.dbt1=0 devs.dbt2=1 or 0 8.2.8 a) b) channel 7-10: short to gnd diagnosis delay time. ?diagnosis blind time? see chapter ?control of the device?, figure 19 , figure 20 t d 1.65 2.5 3.45 ms devs.dbt1=1 devs.dbt2=0 3.3 5 7.3 ms devs.dbt1=1 devs.dbt2=1
tle 8110 ee smart multichannel switch diagnosis data sheet 33 rev. 1.4, 2013-07-02 figure 19 diagnosis blind time figure 20 diagnosis bli nd time - logic flow channel 7 - 10 off ol, sg -diagnosis active on 1 incident - e.g. temporal ?short to gnd? [sg] 1 1 1 0 0 1 1 diagnosis blind time [dbt] active diagnosis blind time [dbt] triggered by diagnostic incident diagnostic register entry, because failure present after ending dbt diagnosis register : 11: no error 10: over load 01: open load 00: short to ground diagnosis blind time [dbt] activation dbt is triggered by open load [ol] or short-to-ground [sg] -detection during off-condition of ch7-10. dbt is activated by devs.dbt1, devs.dbt2 (see ?control of the device?). dbt.vsd inx signal output voltage dbt t err < t dbt t err < t dbt t err > t dbt ?blind? window finishes as soon as the error disappears within the dbt ol, sg- error detected dbt counter set 0 = t dbt decrement dbt counter ol, sg- error present? counter t > t dbt yes reset counter (finish dbt- frame) no ol, sg- error present? yes channel off yes failure detected => register entry yes dbt_flow.vsd no
data sheet 34 rev. 1.4, 2013-07-02 tle 8110 ee smart multichannel switch parallel inputs 9 parallel inputs 9.1 description parallel inputs there are 10 input pins available are on TLE8110EE to control the output stages. each input signal controls the output stages of its assign ed channel. for example, in 1 controls out1, in2 controls out2, etc. a ?low?-signal at inx switches the related output channel off. the zener diode protects the input circuit against esd pulses. for details about the boolean operation, refer to the chapte r ?control of the device?, fo r details about timing refer to figure 12 . 9.2 electrical character istics parallel inputs electrical characteristics: parallel inputs 3.0v < v cc < 5.5v; 4.5v < v dd < 5.5v, t j = -40 c to +150 c, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) pos. parameter symbol limit values unit conditions min. typ. max. parallel inputs 9.2.1 low level of parallel input pin v inxl -0.3 - v cc * 0.2 v- 9.2.2 high level of parallel input pin v inxh v cc * 0.4 -v cc v- 9.2.3 parallel input pin switching hysteresis v inxhy 15 60 300 mv 1) 1) parameter not subject to produ ction test. specified by design. 9.2.4 a) .........b) input pin pull-down current i inxh 20 40 85 a v inx =5v i inxl 2.4--av inx =0.6v 1)
tle 8110 ee smart multichannel switch protection functions data sheet 35 rev. 1.4, 2013-07-02 10 protection functions the device provides embedded protecti ve functions. integrat ed protection functions are designed to prevent ic destruction under fault conditions described in this do cument. fault conditions are considered ?outside? the normal operating range. protection functions are no t designed for continuous repetitive operation. there is an over load and over temperature protection implemented in the TLE8110EE. if a protection function becomes active during the write cyc le of diagnosis information into the diagnosis register, the information is latched and stored into th e diagnosis register after the write process. in order to achieve a maximum protection, the affected channel with over current or over temperature (oct) is switched and latched off, channel can be turned on again after the diagnosis register is cleared ( chapter 12.3.2 ) or if a different new di agnosis overrides the oct. for the failure condition of reverse currents, the device contains a ?reverse current protection comparator? [rcp]. this rcp can opti onally be activated by setting the devs.rcp bit. in case the comparator is activated, it detects a reverse current and switch es on the related output channel. the channel is kept on up to a revers e current channel dependent threshold i rcp_off . this threshold is defined by regulators target value to keep the output voltage at >/~-0.3v. if the current exceeds a defined value, the comparator switches off and other pr otection functions are protecting the circuit against reverse current. that means that at higher currents / or in case rcp is de-activ ated / not activated, the reverse current is flowing through the body diode of the dmos. in that case, the voltage dr ops to typically -0.6v according the voltage of the body diode. in case the comparator threshold has been exce eded and the rcp has been switched off, the functions remains off until the reverse current arrives back to ze ro reverse current. only then, the comparator can be activated again after a delay time t rcp_on_delay . this function reduces the un-wanted influence of a reverse current to the analogue part of the circuit (such as the diagnosis). for more details about the functionality, see figure 23 and figure 24 and concerning the settings and the related registers, refer to chapter ?con trol of the device?. figure 21 block diagram protection functions block_diag_protection.vsd temperature sensor short circuit detection outx gate control serial control t logic ctrl. ref. -300mv rcp
data sheet 36 rev. 1.4, 2013-07-02 tle 8110 ee smart multichannel switch protection functions figure 22 overload shutdown thresholds and delay times overload shutdown thresholds and delay times t i dsd(low) i dsd(high) t offcl _l t offcl_h i ds no switch-off with i < i dsd (low) switch-off after t offcl_l (long) with i > i dsd(low) immediate switch-off if i = i dsd(high) after t offcl_h switch-off after t offcl_h (short) with i > i dsd (high) switch-off after t offcl_l (long) if i falls below i dsd (high) before t offcl_h filter timer is started at i dsd(low) threshold and stopped: ? at t = t offcl _h if at t = t offcl _h i > i dsd(high) ? at t = t offcl _l if i dsd (low) < i < i dsd(high)
tle 8110 ee smart multichannel switch protection functions data sheet 37 rev. 1.4, 2013-07-02 10.1 electrical characteristics overload protection function electrical characteristics: overload protection function 3.0v < v cc < 5.5v; 4.5v < v dd < 5.5v, t j = -40 c to +150 c, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) pos. parameter symbol limit values unit conditions min. typ. max. over current protection 10.1.1 output current shut-down threshold low (channel 1 to 4) i dsd(low) 2.6 3.8 5 a - 10.1.2 output current shut-down threshold low (channel 5 to 6) i dsd(low) 3.70 4.85 6.00 a - 10.1.3 output current shut-down threshold low (channel 7 to 10) i dsd(low) 1.7 2.3 2.9 a - 10.1.4 output current shut-down threshold high (channel 1 to 4) i dsd(high) - 1.5 * i dsd (low) -a 1) 10.1.5 output current shut-down threshold high (channel 5 to 6) i dsd(high) - 1.5 * i dsd (low) -a 1) 10.1.6 output current shut-down threshold high (channel 7 to 10) i dsd(high) - 1.5 * i dsd (low) -a 1) 10.1.7 short overload shutdown delay time (all channels) t offcl_h 5 21 40 s valid for ?output current threshold high? 1) 10.1.8 long overload shutdown delay time (all channels) t offcl_l 10 40 70 s valid for ?output current threshold low? over temperature protection 10.1.9 thermal shut down temperature t jsd 175 190 205 c 1) 10.1.10 thermal shut down hysteresis t jsdh 10 - 20 k 1)
data sheet 38 rev. 1.4, 2013-07-02 tle 8110 ee smart multichannel switch protection functions reverse current protection 10.1.11 reverse current comparator switch-off current level ch 1 - 4 i rcp_off - -0.9 - a devs.rcp = 1 1) tj = 25c 10.1.12 reverse current comparator switch-off current level ch 5 - 6 i rcp_off - -0.6 - a devs.rcp = 1 1) tj = 25c 10.1.13 reverse current comparator switch-off current level ch 7 - 10 i rcp_off - -0.45 - a devs.rcp = 1 1) tj = 25c 10.1.14 reverse current comparator switch on delay time t rcp_on_ delay - 24 - s devs.rcp = 1 1) tj = 25c 1) parameter not subject to production test. specified by design. electrical characteristics: overload protection function (cont?d) 3.0v < v cc < 5.5v; 4.5v < v dd < 5.5v, t j = -40 c to +150 c, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) pos. parameter symbol limit values unit conditions min. typ. max.
tle 8110 ee smart multichannel switch protection functions data sheet 39 rev. 1.4, 2013-07-02 figure 23 reverse current protection comparator 6 reverse current i d leakage (neighbour channel) rcp not active rcp active i rcp_off rcp.vsd i d t t reverse current comparator switch-off current level i rcp_off reverse current comparator switch-off current level maximum rating - i dsd (low) v d v batt ~ - 300mv rcp active: regulation to vd ~ - 300mv; -id through dmos rcp not active: id through body diode of dmos 0 0 t rcp_on_delay
data sheet 40 rev. 1.4, 2013-07-02 tle 8110 ee smart multichannel switch protection functions figure 24 reverse current protection comparator (typical behavior vs junction temperature) tj / c i rcp_off /a -40 -20 0 20 40 60 80 100 120 140 -0.1 -0.3 -0.5 -0.7 -0.9 -1.1 -1.3 -1.5 ch1-6 ch7-10 ircp_off_tc_12_ch.vsd
tle 8110 ee smart multichannel switch 16 bit spi interface data sheet 41 rev. 1.4, 2013-07-02 11 16 bit spi interface 11.1 description 16 bit spi interface the diagnosis and control interface is based on a serial peripheral interface (spi). the spi is a full duplex synchronous serial slave interf ace, which uses four lines : s_so, s_si, s_clk and s_cs . data is transferred by the lines s_ si and s_so at the data rate give n by s_clk. the falling edge of s_cs indicates the beginning of a data access. data is sampled in on line s_si at the falling edge of s_clk and shifted out on line so at the rising edge of sclk. each acce ss must be terminated by a rising edge of s_cs . a modulo 8 counter ensures that data is taken only, when a multiple of 8 bit has been transferred. if in one transfer cycle not a multiple of 8 bits have been counted, the data frame is ignored. the interface provides daisy chain capability. figure 25 16 bit spi interface the spi protocol is described in chapter ?control of the device?. concerning reset of the spi, please refer to the chapter ?reset? 11.2 timing diagrams figure 26 spi timing diagram 14 13 12 11 14 13 12 11 msb msb lsb 6 5 4 3 2 1 lsb 6 5 4 3 2 1 10 9 8 10 9 8 7 7 s_so s_si s_cs s_clk time spi.vsd s_ cs s_clk s_si t cs lead t cst d t cslag t sclkh t sclkl t sclkp t sisu t sih s_so t sodis 0.7 v dd 0.2 v dd 0.7 v dd 0.2 v dd 0.7 v dd 0.2 v dd 0.7 v dd 0.2 v dd t sov t so(en )
data sheet 42 rev. 1.4, 2013-07-02 tle 8110 ee smart multichannel switch 16 bit spi interface 11.3 electrical characteris tics 16 bit spi interface electrical characteristics: 16 bit spi interface 3.0v < v cc < 5.5v; 4.5v < v dd < 5.5v, t j = -40 c to +150 c, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) pos. parameter symbol limit values unit conditions min. typ. max. input characteristics (cs , sclk, si) 11.3.1 l level of pin s_cs s_clk s_si v s_csl v s_clkl v s_sil -0.3 - v cc * 0.2 v- 11.3.2 h level of pin s_cs s_clk s_si v s_csh v s_clkh v s_sih v cc * 0.4 -v cc v- 11.3.3 hysteresis input pins v s_cshy v s_clkhy v s_sihy 20 100 300 mv - 11.3.4 a) b) input pin pull-down current s_clk s_si i s_clkh i s_sih 20 40 85 a v in =5v i s_clkl i s_sil 2.4--av in =0.6v 1) 11.3.5 a) b) input pin pull-up current s_cs i s_csh -4 - - a v s_cs = 2 v, v cc =3.3v i s_csl -20 -40 -85 a v s_cs = 0 v, v cc =5v output characteristics (so) 11.3.6 l level output voltage v s_sol 0-0.4v i s_so = -2 ma 11.3.7 h level output voltage v s_soh v cc - 0.4 v - v cc i s_so = 1.5 ma 11.3.8 output tristate leakage current i s_sooff -10 - 10 a v s_so = v cc timings 11.3.9 serial clock frequency f s_clk 0-5mhz- c l = 50 pf 1) 11.3.10 serial clock period t s_clk(p) 200 - - ns 1) 11.3.11 serial clock high time t sclk(h) 50 - - ns 1) 11.3.12 serial clock low time t sclk(l) 50 - - ns 1) 11.3.13 enable lead time (falling cs to rising sclk) t cs(lead) 250 - - ns 1) 11.3.14 enable lag time (falling sclk to rising cs ) t cs(lag) 250 - - ns 1) 11.3.15 transfer dela y time (rising cs to falling cs ) t cs(td) 250 - - ns 1) 11.3.16 data setup time (required time si to falling sclk) t si(su) 20 - - ns 1) 11.3.17 data hold time (falling sclk to si) t si(h) 20 - - ns 1) 11.3.18 output enable time (falling cs to so valid) t so(en) - - 200 ns c l = 50 pf 1)
tle 8110 ee smart multichannel switch 16 bit spi interface data sheet 43 rev. 1.4, 2013-07-02 11.3.19 output disable time (rising cs to so tri- state) t so(dis) - - 200 ns c l = 50 pf 1) 11.3.20 output data valid time with capacitive load t so(v) - - 100 ns c l = 50 pf 1) 11.3.21 diagnosis clear-to-read idle time t didle 16 - - s 1) 11.3.22 diagnosis overcurrent-to-clear idle time t ocidle 12 - - s 1) 1) not subject to production test, specified by design. electrical characteristics: 16 bit spi interface (cont?d) 3.0v < v cc < 5.5v; 4.5v < v dd < 5.5v, t j = -40 c to +150 c, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) pos. parameter symbol limit values unit conditions min. typ. max.
data sheet 44 rev. 1.4, 2013-07-02 tle 8110 ee smart multichannel switch control of the device 12 control of the device this chapter describes the spi-interface signals, the protocol, registers and commands. reading this chapter allows the software engineer to control the device. the chapter contains also some information about communication safety features of the protocol. 12.1 internal clock the device contains an internal clock oscillator. 12.2 spi interface. si gnals and protocol 12.2.1 description 16 bi t spi interface signals s_cs - chip select: the system micro controller selects the TLE8110EE by means of the s_cs pin. whenever the pin is in low state, data transfer can take place. when s_cs is in high state, any signals at the s_clk and s_si pins are ignored and s_so is forced into a high impedance state. s_cs high to low transition: ? the information to be transferred loaded into the shift register (16-bit protocol). ? s_cs low to high transition: ? command decoding is only done, when af ter the falling edge of cs exactly a multiple (1, 2, 3, ?) of eight s_clk signals have been detected. (see modulo-8 counter: chapter 12.2.4.2 ) electrical characteristics: internal clock 3.0v < v cc < 5.5v; 4.5v < v dd < 5.5v, t j = -40 c to +150 c, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) pos. parameter symbol limit values unit conditions min. typ. max. parallel inputs 12.1.1 internal cloc k oscillator frequency f int_osc - 500 - khz 1) 1) parameter not subject to produ ction test. specified by design.
tle 8110 ee smart multichannel switch control of the device data sheet 45 rev. 1.4, 2013-07-02 s_clk - serial clock: this input pin clocks the inte rnal shift register. the serial input (s_si) transfers data is shifted into the register on the falling edge of s_clk while the seri al output (s_so) shifts the informat ion out on the rising edge of the serial clock. it is essential that the s_clk pin is in low state whenever chip select cs makes any transition. s_si - serial input: serial input data bits are shifted in at th is pin, the most significant bit first. the bit at the s_si pin is read on the falling edge of s_clk. s_so serial output: data is shifted out serially at this pin, the most significant bit first. s_so is in high impedance state until the s_cs pin goes to low state.the next bits will appear at the s_so pin following the rising edge of s_clk. 12.2.2 daisy chain the spi-interface of tl e8110ee provides daisy chain capability, see chapter 12.2.3.4 for more de tails. in this configuration several devices are activated by the same s_cs signal. the s_si line of one device is connected with the s_so line of another device (see figure 27 ), which builds a chain. the ends of the chain are connected with the output and input of the master device, s_so and s_si respective ly. the master device provides the master clock clk, which is connected to the s_clk line of each device in the chain. by each clock edge on s_clk, one bit is shifted into the s_si. the bit shif ted out can be seen at so. after 16 s_clk cycles, the data transfer for one device has been finished. in single chip configuration, the s_cs line must go high to make the device accept the transferred data. in daisy chain config uration the data shifted out at device 1 has been shifted in to device 2. example: when using three devices in daisy chain, three times 16 bits have to be shifted through the devices. after that, the s_cs line must go high (see figure 27 ). figure 27 principle example for data transfer in daisy chain configuration note: due to the integrated modulo 8 counter, 8 bit and 16 bit devices can be used in one daisy chain. 12.2.3 spi protocol the device contains two protocol styles which are applied dependent of the used commands. there is the standard 16-bit protocol and the 2x8-bit protocol. both protocols can appear also be mixed. 12.2.3.1 16-bit protocol each cycle where a serial data or command frame is sent to the s_si of the spi interface, a data frame is returned at the same time by the s_so the content of the s_so frame is dependent on the previous command which has been sent to s_si. read command (r/w = r) returns one cycle later the content of the addresses register. (see figure 28 ). si so cs clk si device 3 si device 2 si device 1 so device 3 so device 2 so device 1 time spi_dasychain2.emf
data sheet 46 rev. 1.4, 2013-07-02 tle 8110 ee smart multichannel switch control of the device figure 28 16-bit protocol s_si serial input reset value: n.a. 1514131211109876543210 w /r addr data / cmd field bits description w /r 15 w /r - write / read 0 write register: the register content of th e addressed register will be updated after cs low high transition. after sending a write command, the device returns data according the addressed register 1 read register: the register content of t he addressed register will be sent in the next frame. addr 14:12 addr - address pointer to register for read and write command data/cmd 11:0 data_cmd - data / command data written to or read from register selected by address addr s_so serial output reset value: xxxx xxxx xxxx xxxx b 1) 1) after reset is send a short diagnosis and device status cmd_csds, see chapter 12.3.1.2 . cs1514131211109876543210 par addr data field bits description par 15 par - parity bit 1: odd number of '1' in data and address field 0: even number of '1' in data and address field addr 14:12 address address which has bin addressed data 11:0 data content of address or feedback data r adr / data w adr / data adr / data r dept. of previous r/w register short diagnosis* s_cs s_si s_so spi_protocol_normal_mode.vsd * dependent on adr; in case cmd or dcc is addressed, related content.
tle 8110 ee smart multichannel switch control of the device data sheet 47 rev. 1.4, 2013-07-02 note: reading a register needs two spi frames . in the first frame the rd command is sent. in the second frame the output at spi signal so will contain the requested information. a new command can be executed in the second frame. 12.2.3.2 2x8-bit protocol each cycle where a serial data or command frame is sent to the s_si of the spi interface, a data frame is returned at the same time by the s_so. the content of the s_so frame is dependent of the previous command which has been sent to s_si and the content of the actual content of s_si: the first upper byte send to s_si controls the content of the lower byte actual retu rned by s_so. the lower byte send to s_si controls the lower byte in s_so of the next frame. (see figure 29 ). figure 29 2x8-bit protocol dmsx s_cs s_si s_so spi_protocol_2x8bit.vsd opsx upper byte do upper byte lower byte opf lower byte upper byte lower byte upper byte lower byte
data sheet 48 rev. 1.4, 2013-07-02 tle 8110 ee smart multichannel switch control of the device note: reading a register needs two spi frames . in the first frame the rd command is sent. in the second frame the output at spi signal so will contain the requested information. a new command can be executed in the second frame. 12.2.3.3 16- and 2x8-bi t protocol mixed. the 16-bit and 2x8-bit protocols are mixed according the used commands (see chapter 12.3.1 ). special care should be taken, changing from the 16-bit protocol to the 2x8-bit protocol. in this case, it is important to send a nop command to s_si. otherwise, by sending instead a command, a collisi on between the s_so data in the following frame and th e lower byte of the 2x8-bit protocol will happen (see chapter 12.2.3.2 ). s_si serial input reset value: n.a. 1514131211109876543210 upper byte lower byte field bits description upper byte 15:8 upper byte contains the command, which is performed afte r sending 8 bit to s_si. the action out of this command is affecting the lower byte of s_so of the actual communication frame. lower byte 7:0 lower byte contains the command and data, which is performed at the end of the actual communication frame. the action out of th is command is affection the upper byte of s_so of next communication frame. s_so serial output reset value: xxxx xxxx xxxx xxxx b 1) 1) after reset is send a short diagnosis and device status cmd_csds, see chapter 12.3.1.2 . cs1514131211109876543210 upper byte lower byte field bits description upper byte 15:8 upper byte contains the data according the command and data in the lower byte of the previous communication frame. lower byte 7:0 lower byte contains the data according the command in the upper byte of the actual communication frame
tle 8110 ee smart multichannel switch control of the device data sheet 49 rev. 1.4, 2013-07-02 figure 30 16-bit protocol 12.2.3.4 daisy-chain and 2x8-bit protocol when using the TLE8110EE in a daisy-chain connecti on with other devices (TLE8110EE and non) special care has to be taken to avoid interference of 2x8-bit prot ocol with normal communication. few simplified rules must be followed for a safe spi communication in daisy-chain environment: 1. all TLE8110EE devices have to be routed at the b eginning of the chain, othe r devices than TLE8110EE afterward 2. compactcontrol commands (2x8-bit prot ocol) must not be addressed to TLE8110EE 3. the spi frame of the daisy-chain must be extended of additional 8-bit (all zeros 00 h ) at beginning of the frame 4. when a read/clear diagnosis register a command (dra, dracl) is addressed to TLE8110EE, a nop command must be sent to the next TLE8110EE on the chain 5. when a read/clear diagnosis register a command (d ra, dracl) is addressed to TLE8110EE, response of the next device on the chain must be ignored in the next spi cycle details in figure 31 and figure 32 . upper byte s_cs s_si s_so spi_protocol_16_2x8bit_mixed.vsd lower byte upper byte lower byte cmd upper byte 0 cmd data nop data upper byte lower byte 0 lower byte upper byte lower byte upper byte lower byte protocol change from 2x8-bit to 16-bit protocol change from 16-bit to 2x8-bit critical protocol change from 16-bit to 2x8-bit s_cs s_si s_so cmd data upper byte lower byte data... lower byte upper byte lower byte upper byte lower byte s_cs s_si s_so collission 2x8-bit protocol is dominant
data sheet 50 rev. 1.4, 2013-07-02 tle 8110 ee smart multichannel switch control of the device figure 31 daisy-chain and 2x8-bit protocol daisy- chain and 2x8 -bit pr otocol from dev.n from dev.1 to dev.n to dev.1 s_cs s_si s_so spi daisy-chain word first 8-bit that could interfere with compaccontrol of device 1 lower-byte from dev.n affected by the reaction of dev.1 to compactcontrol t from dev.n from dev.1 to dev.n to dev.1 s_cs s_si s_so spi daisy-chain word t 00 h all zeros 8-bit extension last 8-bit to be ignored safe communication with first all zeros 8-bit extension critical communication with first 8-bit interpreted as compactcontrol (2x8-bit protocol )
tle 8110 ee smart multichannel switch control of the device data sheet 51 rev. 1.4, 2013-07-02 figure 32 dra, dracl to dev.n a nd nop command to dev.n+1 dra, dracl to dev .n and nop command to dev .n+1 from dev.n to dev.n+1 s_cs s_si s_so spi daisy-chain word t safe communication with nop command send to dev .n+1 and ignored response critical communication with dev.n+1 response altered by dev .n response to previous dra /dracl to dev.n from dev.n+1 dra/dracl nop from dev.n to dev.n+1 to dev.n from dev.n+1 spi daisy-chain word no response expected ignored response to dra-/cl from dev.n to dev.n+1 s_cs s_si s_so spi daisy-chain word t to dev.n from dev.n+1 dra/dracl x-command from dev.n to dev.n+1 to dev.n from dev.n+1 spi daisy-chain word response to x-command 8-bit altered by dev.n response to dra-/cl response to dra-/cl
data sheet 52 rev. 1.4, 2013-07-02 tle 8110 ee smart multichannel switch control of the device 12.2.4 safecommunication the device contains some safety f eatures, which are improving the protection of the application against mal- function in case of disturbance of the communic ation between the micro controller and the device: 12.2.4.1 encoding of the commands the commands are encoded. in case other bit-patterns, then the defined once are received, the commands are ignored and the communication error can be read out with the command cmd_rsds (see chapter 12.3.1.2 ). 12.2.4.2 modulo-8 counter the modulo is the integral remainder in integral divisi on. in data communications, a modulo based approach is used to ensure that user informati on in spi protocols is in the correct order. the device has a receiver-side counter, and a defined counter size. the modulo counter specifies the number of subsequent numbers available. in case of TLE8110EE modulo 8 counter specifies 8 serial numbers. the modulo 8 counter ensures that data is taken only, when a multiple of 8 bit has been transferred. if in one transfer cycle not a multiple of 8 bits have been counted, the data frame is ignored and a communicati on error is indicated in the cmd_rsds - feedback (see chapter 12.3.1.2 ). 12.3 register and command - overview this chapter describes the registers and commands. th e commands allow to carry through some actions, such as reading out or clearing the diagnos is or reading out the input pins. specially highlighted here should be the encoded cm d_dmsx/opsx commands - compactcontrol -, a highly efficient command-set to set a part of the output pins and read out the diagno sis at the same time. included in this command set is the possibility to chec k, if the communication works well as also the possibility to read-out some of the parallel input pins inx. using this compact comma nd set can reduce the workload of the micro-controller during run-time significantly. cmd_rsd is preformed and short diagnostics [sd] is returned after each write cycl e to any of the writable registers. after start-up of the device, the registers are loaded with the default settings as described below in the register descriptions. the registers ar e cleared and set back to the default values, when a low signal is applied to the pin rst or an under-voltage condition appears at the supply pin v cc what causes an under-voltage reset. if a low signal at pin en is applied or an under-voltage condition appears at pin v dd , the registers are not cleared.
tle 8110 ee smart multichannel switch control of the device data sheet 53 rev. 1.4, 2013-07-02 table 1 name type addr short description see: cmd w 1) 1) if a read command is send, the command is ig nored and s_so returns a frame with ?0?. 000 b commands chapter 12.3.1 dcc w 1) 001 b diagnosis registers and compact control chapter 12.3.2 outx w/r 010 b output control register chx. chapter 12.3.3 devs w/r 011 b device settings chapter 12.3.6 mscs w/r 100 b reserved isax w/r 101 b input or serial mode register chx bank a chapter 12.3.4 isbx w/r 110 b input or serial mode register chx bank b chapter 12.3.4 pmx w/r 111 b parallel mode control of chx with chy chapter 12.3.5 table 2 register overview name addr11109876543210def. 1) 1) default values after reset cmd w 2) 2) if a read command is send, the command is ig nored and s_so returns a frame with ?0?. 000 b 0111 command --- dcc w 2) 001 b command --- outx w/r 010 b 11out 10 out9 out8 out7 out6 out5 out4 out3 out2 out1 c00h devs w/r 011 b rcp dbt2 dbt1 0 0 0 0 0 0 dcc 10 dcc 9 dcc 18 007h mscs w/r 100 b reserved 000h isax w/r 101 b is6 is5 is4 is3 is2 is1 aaah isbx w/r 110 b 0 0 0 0 is10 is9 is8 is7 0aah pmx w/r 111 b 0000pm91 0 pm89 pm78 pm56 0 pm34 pm23 pm12 000h
data sheet 54 rev. 1.4, 2013-07-02 tle 8110 ee smart multichannel switch control of the device figure 33 logic output control block diagram TLE8110EE out1 out2 out3 diagn. current off = 0 diagn. current on = 1 dc18[0]: in3 pm12=1 pm12=0 pm23=0 out10 in10 pm910=1 pm910=0 logic_output_control_core10.vsd serial-mode out1=0 = 00 and in/serial-mod0 = 11 in-mode = 10 serial-mode out1=1 = 01 is1[1:0]: in4 out6 out7 out8 pm78=0 pm78=1 pm23=1 pm56=0 pm56=1 is2[1:0] is1[1:0] ch5 ch9 in1 out1 in2 out2 11 10 0x 11 10 0x out 10 11 10 0x is10[1:0]
tle 8110 ee smart multichannel switch control of the device data sheet 55 rev. 1.4, 2013-07-02 12.3.1 cmd - commands by using the address range cmd[14:12]=?000? commands can be send to the device. the feedback of the commands is provided in the next spi so frame.details about the feedback on each command is described in the chapter 12.3.1.1 . it is possible to perform per each communication frame one command out of group-a (see following description of the commands) and one command out of group-b at the same time. performing more then one command of one group is not possible. for the case, this happens, the commands are ignored. overview commands cmd command register reset value: n.a. s_si spi_serial input cmd 11109876543210 rsd 011100000001 rsds 011100000010 rpc 011100000100 rinx 011100001000 csds 011100010000 nop 011100000000 field command type description command bits group-b (bits [7:4]) all other bit combinations are not valid. command will be ignored then. nop 0000 w nop - no operation. a frame with ?0000h? will be returned cmd_csds 0001 w cmd_csds - command: clear short diagnosis and device status clear the device st atus information. performing this clear command clears the information in the reset and communication error information as long as the incident is not present anymore . if the incident is still present, the re lated bits remain setted. performing this command does not clear the diagnosis registers. the diagnosis informa tion is cleared by the clear diagnosis commands. (see chapter 12.3.2 ) so returns a frame with ?0000h? after performing cmd_csds or in case this command is carried out together with a command out of group-a, the feedback is according the group-a command command bits group-a (bits [3:0]) all other bit combinations are not valid. command will be ignored then.
data sheet 56 rev. 1.4, 2013-07-02 tle 8110 ee smart multichannel switch control of the device 12.3.1.1 cmd_rsd - command: return short diagnosis the command cmd_rsd offers the po ssibility to read out t he or-operated ?s hort?-diagnosis within one so feedback frame. the data to be send is latched at the end of the command frame . figure 34 spi feedback on cmd_rsd cmd_nop 0000 w nop - no operation. a frame with ?0000h? will be returned cmd_rinx 1000 w cmd_rinx - command: return input pin inx -status ( chapter 12.3.1.4 ) cmd_rpc 0100 w cmd_rpc - command: return pattern check ( chapter 12.3.1.3 ) cmd_rsds 0010 w cmd_rsds - command: return short diagnosis and device status ( chapter 12.3.1.2 ) cmd_rsd 0001 w cmd_rsd - command: return short diagnosis ( chapter 12.3.1.1 ) s_so spi_serial output cs1514131211109876543210 par 0 0 0 0 0 sd10 sd9 sd8 sd7 sd6 sd5 sd4 sd3 sd2 sd1 field command type description w cmd_rsd r/w xxxx dept. of previous r/w sd xxxx s_cs s_si s_so spi_protocol_cmd_rsd.vsd cmd_rsd r/w xxxx
tle 8110 ee smart multichannel switch control of the device data sheet 57 rev. 1.4, 2013-07-02 12.3.1.2 cmd_rsds - comman d: return short diagnosis and device status the command cmd_rsd offers the po ssibility to read out t he or-operated ?short?-d iagnosis and the device status - such as reset-information and communication error - within one so feedback frame. the data to be send is latched at the end of the command frame . figure 35 spi feedback on cmd_rsds field bits type description --- sd1-10 short diagnosis 0 normal operation 1 each sd-bit contains the nand- operated diagnosis error of each related channel. details can be read in diagnosis registers sd is returned after each write cycl e to any of the writable registers. w cmd_rsds r/w xxxx dept. of previous r/w sds xxxx s_cs s_si s_so spi_protocol_cmd_rsds.vsd cmd_rsds r/w xxxx
data sheet 58 rev. 1.4, 2013-07-02 tle 8110 ee smart multichannel switch control of the device s_so spi_serial output cs1514131211109876543210 par 0 0 0 0 0 0 0 sds8 sds7 sds6 sds5 sds4 sds3 sds2 sds1 field bits type description -7:0- sds - short diagnosis and device status -0- sds1 - diagnosis erro r in channel 1 to 6 0 normal operation 1 diagnosis failure -1- sds2 - diagnosis error in channel 7 to 10 0 normal operation 1 diagnosis failure -2- sds3 - under voltage on v cc (digital supply voltage) see figure 36 -3- sds4 - under voltage on vdd (analogue supply voltage) see figure 36 -4- sds5 - modulo counter error 0 normal operation 1previous modulo counter error -5- sds6 - previous communication e rror - encoded command ignored 0 normal operation 1 previous communication error - encoded command ignored -6- sds7 - not used = ?0? always ?0? -7- sds8 - not used = ?0? always ?0?
tle 8110 ee smart multichannel switch control of the device data sheet 59 rev. 1.4, 2013-07-02 figure 36 behaviour of sds3, 4 behaviour of sds 3 and sds 4 in relati on to rst , en, vdd, vcc and cmd .csds vcc rst or... sds3 0 1 0 cmd.csds sds3 vcc rst or... sds4 0 1 0 cmd.csds sds4 en=1 vdd sds4 0 1 1 0 cmd.csds vcc rst or... sds4 0 0 0 cmd.csds sds4 en=0 vdd sds4 0 0 0 0 cmd.csds sds4 en=0 ? 1 en sds4 0 1* 0 cmd.csds sds3_4_behaviour.vsd * during en = 0, the device internal vdd supply is disabled in order to fulfill low quiescent current requirements. after the transition from en=0 to 1, the sds4 will detect under voltage (it is set sds4=1) until the clear command cmd.csds it sent (sds4=0).
data sheet 60 rev. 1.4, 2013-07-02 tle 8110 ee smart multichannel switch control of the device 12.3.1.3 cmd_rpc - comma nd: return pattern check the command cmd_rpc offers the po ssibility to get returned the pr evious command to check if the communication works well. the data to be send is latched at the end of the command frame . figure 37 spi feedback on cmd_rpc 12.3.1.4 cmd_rinx - command: re turn input pin (inx) -status the command cmd_rinx offers the po ssibility to read out the actual status of the input pins. this command allows to check the correct communicati on on the inx pins. the data to be send is latched at the end of the command frame . s_so spi_serial output cs1514131211109876543210 par= 0 000011100000100 field bits type description --- cmd_rpc is returned w cmd_rpc r/w xxxx dept. of previous r/w cmd_rpc xxxx s_cs s_si s_so spi_protocol_cmd_rpc.vsd cmd_rpc r/w xxxx
tle 8110 ee smart multichannel switch control of the device data sheet 61 rev. 1.4, 2013-07-02 figure 38 spi feedback on cmd_rinx s_so spi_serial output cs1514131211109876543210 par 0 0 0 0 0 in10 in9 in8 in7 in6 in5 in4 in3 in2 in1 field bits type description --- inx input pin status the status of the inx pins is read out at the moment of cs high-to-low transition. details see figure 39 . 0 inx = low corresponding off 1 inx = high corresponding on w cmd_rinx r/w xxxx dept. of previous r/w inx xxxx s_cs s_si s_so spi_protocol_cmd_rinx.vsd cmd_rinx r/w xxxx
data sheet 62 rev. 1.4, 2013-07-02 tle 8110 ee smart multichannel switch control of the device figure 39 read-out of inx pins 12.3.2 dcc - diagnosis regi sters and compactcontrol the dcc - diagnosis and compact control set allows to read out and clear the diagnosis registers. additionally this command set offers the possibilit y to proceed with a com pactcontrol mode usin g dms - diagnosis mode set and ops - output pin set command s. this compactcontrol mode offe rs the possibility to control the device with lowest work load on the micro controller side. if any other pattern then the defined commands is rece ived on s_si, the command is ignored and rated as a communication error. in this case, th is incident is reported in sds ( chapter 12.3.1.2 ). if an error in the output channels is detected by the diagno sis circuit, the result is latc hed in the diagnosis registers related to each channel. the diagnosis register is not deleted, when it is just read out. the diagnos is register byte can only be cleared by using the appropriated command. in this ca se, the complete register bank is cleared. when issuing a diagnosis register clear co mmand (drxcl or dmscl), the idle time t didle needs to elapse, from the cs low-to-high transition of t he clear command, before the register content is effectively cleared ( figure 40 ); this time has to be taken into account when trying to read the diagnosis register content after a clear, see chapter 11.3 for t didle definition. after an overcurrent entry is stored in the diagnosis register (oc), the idle time t ocidle needs to elapse before a clear command can effectively clear the entry; if trying to clear the diagnosis register after an oct entry is read ( figure 40 ), this time has to be taken into account starting fr om the cs high-to-low transition of the previous read command, see chapter 11.3 for t ocidle definition. in1 in2 inx control logic out1 out2 outn transfer on cs to spi-so-register latch on cs cmd_rinx rinx si so inx_readout.vsd cs temporal inx register latched by cmd_pinx and cs high-to-low transition
tle 8110 ee smart multichannel switch control of the device data sheet 63 rev. 1.4, 2013-07-02 figure 40 diagnosis idle times dcc diagnosis registers and compact control reset value: n.a. s_si spi_serial input dcc 11109876543210 dra 010100000000 drb 011000000000 dracl 000100000000 drbcl 001000000000 dmscl/opsx 1 0 0 0 opsx dms1/opsx 1 0 1 1 opsx dms2/opsx 1 1 0 1 opsx dms3/opsx 1 1 1 0 opsx diagnosis idle times diagnosis clear-to -read idle time ( t didle ) s_cs s_si t didle t clear diagnosis drxcl/dmscl read diagnosis drx diagnosis gets cleared cleared diagnosis can be read t > t didle diagnosis overcurrent -to -clear idle time ( t ocidle ) s_cs s_si t ocidle t read diagnosis drx clear diagnosis drxcl/dmscl oct can be cleared effective diagnosis clear t > t ocidle oct detected
data sheet 64 rev. 1.4, 2013-07-02 tle 8110 ee smart multichannel switch control of the device dmsx/ops11 dmsx 00000001 dmsx/ops21 dmsx 00000010 dmsx/ops31 dmsx 00000100 dmsx/ops41 dmsx 00001000 dmsx/ops51 dmsx 00010000 dmsx/ops61 dmsx 00100000 dmsx/ops71 dmsx 01000000 dmsx/ops81 dmsx 10000000 field bits type description dcc_dra 11:0 w dra - diagnosis register a (see chapter 12.3.2.1 ) read out diagnosis register a. return the contents in the next spi frame. (see chapter 12.3.2.2 ) dcc_drb 11:0 w drb - diagnosis register b (see chapter 12.3.2.1 ) read out diagnosis register b. return the contents in the next spi frame. (see chapter 12.3.2.2 ) dcc_ dracl 11:0 w dracl - diagnosis register a clear clear the contents of the diagnosis register a. return the content present before the clear in the ne xt spi frame. if the diagnosis error remains, the info rmation remains.(see chapter 12.3.2.2 ) dcc_ drbcl 11:0 w drbcl - diagnosis register b clear clear the contents of the diagnosis register b. return the content present before the clear in the ne xt spi frame. if the diagnosis error remains, the information remains. (see chapter 12.3.2.2 ) dcc_ dmscl 11:8 w dmscl/opsx - diagnosis mode se t, clear / output pins set on sending this command, the diagnosis registers dra, drb as well as the ?virtual? diagnosis output registers do[7:0] (see chapter 12.3.2.3 ) are cleared. output pin settings are done according the content of opsx. returns the contents of cleared dr2 on so in the 2nd byte of the actual communication frame and the output pin feedback in the 1st byte of the next frame. (see chapter 12.3.2.3 ) dcc_ dms1 11:8 w dms1/opsx - diagnosis mode set, register1 / output pins set on sending this command, the diagnosis registers dr1 is selected. output pin settings are done according the content of opsx. returns the contents of dr1 on so in the 2nd byte of the actual communication frame and the output pin feedback in the 1st byte of the next frame. (see chapter 12.3.2.3 ) dcc_ dms2 11:8 w dms2/opsx - diagnosis mode set, register2 / output pins set on sending this command, the diagnosis registers dr2 is selected. output pin settings are done according the content of opsx. returns the contents of dr2 on so in the 2nd byte of the actual communication frame and the output pin feedback in the 1st byte of the next frame. (see chapter 12.3.2.3 )
tle 8110 ee smart multichannel switch control of the device data sheet 65 rev. 1.4, 2013-07-02 12.3.2.1 drx - diagnosis registers contents dcc_ dms3 11:8 w dms3/opsx - diagnosis mode set, register3 / output pins set on sending this command, the diagnosis registers dr3 is selected. output pin settings are done according the content of opsx. returns the contents of dr3 on so in the 2nd byte of the actual communication frame and the output pin feedback in the 1st byte of the next frame. (see chapter 12.3.2.3 ) dcc_ dmsx/opsx 7:0 w dmsx/ops1 - diagnosis mode set x/ output pin set command 1 on sending this command, the diagnosis register is selected according dmsx. the output pins of channel 7-10 are set according the following definitions. the opsx are commands, no register. the comm ands are controlling the contents of isa, isb and outx. ops[7:0] - output pin set 0000 0001: ch7 input select, 1: parallel* / 0 : serial 0000 0010: ch8 input select, 1: parallel* / 0 : serial 0000 0100: ch9 input select, 1: parallel* / 0 : serial 0000 1000: ch10 input select, 1: parallel* / 0 : serial 0001 0000: ch7 output set, 1: on / 0:off 0010 0000: ch8 output set, 1: on / 0:off 0100 0000: ch9 output set, 1: on / 0:off 1000 0000: ch10 output set, 1: on / 0:off (*parallel controlled by inx) sending or operated combinations of above listed options (only opsx) are possible in order to control more then one channel at the same time. if parallel mode mode is selected (in ?input select ?), the serial settings (in ?output select?) are ignored. in parallel mode, the se lected channels are controlled via inx pins. the default setting of isb correspo nds the command ops[7:0] = xxxx 1111b. (parallel mode, status of the outputs according signal on inx) returns the contents the selected drx register on so in the 2nd byte of the actual communication frame and the output pin feedback [opf] in the 1st byte of the next frame. (see chapter 12.3.2.3 ) dra[1:0]x / drb[1:0]x diagnosis register chx bank a and bank b reset value: 0000 0000 0000 b = 000 h field bits type description 11 10 9876543210 dra[1]6 dra[0]6 dra[1]5 dra[0]5 dra[1]4 dra[0]4 dra[1]3 dra[0]3 dra[1]2 dra[0]2 dra[1]1 dra[0]1 11 10 9876543210 0 0 0 0 drb[1]10 drb[0]10 drb[1]9 drb[0]9 drb[1]8 drb[0]8 drb[1]7 drb[0]7
data sheet 66 rev. 1.4, 2013-07-02 tle 8110 ee smart multichannel switch control of the device 12.3.2.2 drx - return on drx commands figure 41 spi feedback on x_drx commands 12.3.2.3 dmsx/opsx - diagnosis mode set / output pin set commands protocol field bits type description dra[1:0]x / drb[1:0]x 1:0 r dra[1:0]x / drb[1:0]x drn[1]x/drn[0]x = 11 no error drn[1]x/drn[0]x = 10 over load, sh orted load, over temperature in on-mode drn[1]x/drn[0]x = 01 open load in off-mode drn[1]x/drn[0]x = 00 short to gnd in off-mode default drx[1:0] = 11 b a new error on the same channel will overwrite older information. the diagnosis information which is returned by so is latched when cs makes a high-to-low transistion of the frame which sends out the register. s_so spi_serial output cs1514131211109876543210 par 0 0 1 drx [1]x drx [0]x drx [1]x drx [0]x drx [1]x drx [0]x drx [1]x drx [0]x drx [1]x drx [0]x drx [1]x drx [0]x field bits type description --- drx contents 0 no diagnosis error 1 diagnosis error w x_drx r/w xxxx dept. of previous r/w drx xxxx s_cs s_si s_so spi_protocol_x_drx.vsd x_drx r/w xxxx
tle 8110 ee smart multichannel switch control of the device data sheet 67 rev. 1.4, 2013-07-02 each cycle where a serial data or comman d frame is sent to the serial input [s i] of the spi interface, a data frame is returned immediately by the serial output [so]. the content of the so frame is dependent of the previous command which has been sent to si and the content of the actual content of si: the first byte send by s_si controls the content of the second byte actual returned by s_so. the second byte send by s_si controls the first byte in s_so of the next frame. (see figure 42 ) figure 42 data transfer in diagnosis and compact control diagnosis register s_si spi_serial input 1514131211109876543210 diagnosis mode set dms[4: 0] output pin set ops[7:0] - serial mode selected par allel or serial mode 0001----ch10: 1:on 0:off ch9: 1:on 0:off ch8: 1:on 0:off ch7: 1:on 0:off ch10: 0 = serial 1 = par. ch9: 0 = serial 1 = par. ch8: 0 = serial 1 = par. ch7: 0 = serial 1 = par. s_so spi_serial output 1514131211109876543210 output pin set feedback opf[ 7:0] diagnosis output do[7:0] diagnosis output registers do[7:0] 76543210 diag register-1 dr4 [1] dr4[0] dr3[1] dr3[0] dr2 [1] dr2[0] dr1[1] dr1[0] diag register-2 dr1na dr3na 1 1 dr6[1] dr6[0] dr5[1] dr5[0] diag register-3 dr10[1] dr10[0] dr9[1 ] dr9[0] dr8[1] dr8[0] dr7[1] dr7[0] dmsx s_cs s_si s_so spi_protocol_short_mode.vsd opsx upper byte do upper byte lower byte opf lower byte upper byte lower byte upper byte lower byte
data sheet 68 rev. 1.4, 2013-07-02 tle 8110 ee smart multichannel switch control of the device output pin feedback 12.3.3 outx - output c ontrol register chx the output control register outx cons ists of 10 bits to control the ou tput channel. each bit switches on/off the related channel. outx becomes only active when is x[1:0] = 0x. for details refer to chapter 12.3.4 . field bits type description do[7:0] 7:0 r do[7:0] - diagnosis output contents according settings of dms[4:0] returned within the same frame as the pointer is send. drx[1:0] definitions: see chapter 12.3.2.1 do[7:6] diag register-2 7:6 r do1na: nand-operated di agnosis of diag register-1 do3na: nand-operated dia gnosis of diag register-3 1: at least one diagnosis error is stored in the related diag register 0: no diagnosis error is stor ed in the related diag register. output pin feedback opf[7:0] 15 14 13 12 11 10 9 8 opf[7] opf[6] opf[5] opf[4] opf[3] opf[2] opf[1] opf[0] field bits type description opf[7:0] 15:8 r opf[7:0] - output pin feedback principally, opf can return the previously send ops word and the in 10:7 -pin settings, dependent serial/parallel-setting of ops: - if serial mode is selected by one or more ops[3:0]-bits, the related opf[7:4]-bits are returning the settings of ops[7:4], send at the previous frame. - if parallel mode is selected by on e or more ops[3:0] -bits, the related opf[7:4]-bits are returning the condition available at the related in 10:7 pins at the moment of s_cs high-to-low transition. a mix of both modes is possible an d depends on the channel related settings. outx output control register data reset value: 1100 0000 0000 b = c00 h
tle 8110 ee smart multichannel switch control of the device data sheet 69 rev. 1.4, 2013-07-02 12.3.4 isx - input or serial mode c ontrol register, bank a and bank b the input or serial control register [ isx[1:0] ] allows to define the way of controlling the output channels. there are 4 setting options possible: ? standard serial control: the relat ed output channel is set according the content of the outx register. ( chapter 12.3.3 ) ? a further possibility is t he control by the input pins ? the settings of the parallel mode register pmx[0]. ( chapter 12.3.5 ) ? additionally possible is the and operation between the se tting of the outx register and the pwm signal at the input pin. 11109876543210 1 1 out10 out9 out8 out7 out6 out5 out4 out3] out2 out1 field bits type description outx[9:0] 9:0 r/w data - outx[9:0] outx = 0 according chan nel is switched off outx = 1 according c hannel is switched on default (all channels off) out[9:0] = 00 0000 0000 b = 000 h out[11:10] 11:10 r/w data - outx[11:10] bits are set to out[11:10] = 1. isax input or serial mode control register bank a command reset value: 1010 1010 1010 b = aaa h 11 10 9876543210 is6 is5 is4 is3 is2 is1 isbx input or serial mode control register bank b command reset value: 0000 1010 1010 b = 0aa h 11 10 9876543210 0 0 0 0 is10 is9 is8 is7
data sheet 70 rev. 1.4, 2013-07-02 tle 8110 ee smart multichannel switch control of the device 12.3.5 pmx - parallel mode register chx the parallel mode register pmx[1] allows to ?inform? the device about externally parallel connected output channels. if a pmx bit is set, the ?lower? related input cha nnel controls the indicated ou tput channels to achieve best possible matching and according to that highest efficiency of both channels. additionally to that, the clampsafe feature allows high matching during clamping. 12.3.6 devs - de vice settings this register allows additional device settings. for details refer also to th e chapter ?electrica l characteristics?. the diagnosis current control register allow to select between different diagnosis modes. the diagnosis currents can be switched off to av oid glowing of any connected leds. field bits type description isx[1:0] 11:0 isax 7:0 isbx r/w command - is[1:0] isx[1:0]= 0x: serial mode - the channel is set on/off by outx. 10: input mode - chx on/off according inx 11: and operate mode inx with outx -> chx on if outx & inx =1 default all channels isx[1:0] = 10 b pmx parallel mode register chx command reset value: 0000 0000 0000 b = 000 h 11 10 9876543210 0 0 0 0 pm910 pm89 pm78 pm56 0 pm34 pm23 pm12 field bits type description pmx 11:8 r/w 0 pmx 7:0 r/w pmx - parallel mode bit 0 direct mode 1 parallel mode of channel 1 with x+1 default pmx[0] = 0 controlling parallel mode is possible between channel 1 to 4, 5 to 6, 7 to 10. in between the groups, no parallel mode is supported but possible. in case parallel mode is chosen and a diagnosis error at only one of the channels is detected, the acco rding diagnosis bit is set. this information mismatch can be caused by tolerance related in- balance of the channels connected together in parallel mode. the diagnosis bits should be or-operated by the micro controller side. devs device settings command reset value: 0000 0000 0111 b = 007 h
tle 8110 ee smart multichannel switch control of the device data sheet 71 rev. 1.4, 2013-07-02 11 10 9876543210 rcp dbt2 dbt1 0 0 0 0 0 0 dcc10 dcc9 dcc18 field bits type description rcp 11 r/w rcp - reverse current protection 1: reverse current comp is enabled (valid for all channels) 0: disabled default: rcp = 0 dbt2 10 r/w dbt2,1 - diagnosis blind time channel 7 to 10 0,0 standard filter time of typ. 150s 1,0 standard filter time of typ. 150s 0,1 off-state diagnosis blind time of typ. 2.5ms 1,1 off-state diagnosis blind time of typ. 5ms dbt1 9 devs[7:5] 7:5 r/w reserved, must be set to 0 default: 0 devs[4:3] 4:3 r/w not used. set to ?0? dccx 2:0 r/w dccx - diagnosis current control dcc18 switching on/off di agnosis current of ch1-8 dcc9 switching on/off diagnosis current of ch9 dcc10 switching on/off di agnosis current of ch10 0 off-state diagnosis (detection of open load and short to gnd) of chx is switched off. on state diagnosis (over current and over temperature detect ion) is still active. diagnosis current is switched off. 1 off-state (detection of open load and short to gnd) and on- state (over current and over temperature detection) diagnosis of chx switched on, diagnosis current is switched on default dcc = 1
data sheet 72 rev. 1.4, 2013-07-02 tle 8110 ee smart multichannel switch package outlines 13 package outlines figure 43 pg-dso-36 exposed pad green product (rohs compliant) to meet the world-wide customer requirements for environmentally friendly products and to be compliant with government regulations the device is available as a green product. green products are rohs-compliant (i.e pb-free finish on leads and suitable for pb-free soldering according to ipc/jedec j-std-020). pg-dso-36-24, -38, -41, -42, -50-po v09 exposed diepad index marking 1) does not include plastic or metal protrusion of 0.15 max. per side 2) does not include dambar protrusion of 0.05 max. per side 3) distance from leads bottom (= seating plane) to exposed diepad index marking 1 18 36 19 18 1 19 36 bottom view 0.65 17 x 0.65 = 11.05 ?.08 0.33 2) 3) a-b 0.17 m 36x c c c d 0.1 36x seating plane 0...0.10 stand off -0.2 2.45 2.55 max. 1.1 -0.2 7.6 1) 0.35 x 45? 0.7 ?.2 10.3 ?.3 +0.09 0.23 8? max. a d 1) 12.8 -0.2 b pg-dso-36-38 pg-dso-36-38 pg-dso-36-24, -41, -42 package a6901-c007 a6901-c003 a6901-c001 leadframe 5.2 7 7 4.6 pg-dso-36-50 a6901-c008 6.0 5.4 5.1 5.1 exposed diepad dimensions ejector mark 4) 4) excluding the mold flash allowance of 0.3 max per side ex ex ey ey 0.65 1.67 17 x 0.65 = 11.05 9.73 0.45 ex ey you can find all of our packages, so rts of packing and others in our infineon internet page ?products?: http://www.infineon.com/products . dimensions in mm
tle 8110 ee smart multichannel switch revision history data sheet 73 rev. 1.4, 2013-07-02 14 revision history TLE8110EE revision history: 2013-07-02 rev. 1.4 rev. 1.4 document release added pin names to pin configuration picture, figure 3 improved definition of item 6.2.5 improved definition of item 6.2.11 rev. 1.3.1 2011-05-26: data sheet release new detailed description of device diagnosis in chapter 8 , polling procedure provided load clamping energy measurement setup description added at chapter 7.2 removed lotc-bit configuration/functionality, parameters 10.1.9 and 10.2.12 with related footnote 2), both removed figure. 20: timing (cln over current latch...), removed chapter 12.3.2 , description reworked added figure 22 for over-current pr otection explanation added item 11.3.21 , item 11.3.22 for diagnosis clear/read delays chapter 12.3.2 , added description of diagnosis clear/read delays chapter 12.2.3.4 added to describe daisy-chain operation tor-bit functionality removed package name generalized to pg-dso-36 rev. 1.3 2011-05-02: added reverse current comparator functionality rev. 1.2 2011-02-02: removed reverse current comparator functionality rev. 1.11 2011-02-02: footnote added for ear specs added footnotes 2) 3) 4) 5) in chapter 7.3 rev. 1.1 2011-01-10: eas/ear spec updat e for single and parallel connection parallel connection factors removed, parallel ear spec cleaned/updated, chapter 7.4 ear cumulative scenario removed, chapter 7.2 ear ratings cleaned/updated, chapter 7.3 eas ratings cle aned/updated, chapter 4.1 rev. 1.01 2010-12-01: minor changes clamping energy formula reorganized in chapter 7.2 , equation for rl=0 removed rev. 1.0 2009-06-15: data sheet release
edition 2013-07-02 published by infineon technologies ag 81726 munich, germany ? 2013 infineon technologies ag all rights reserved. legal disclaimer the information given in this docu ment shall in no event be regarded as a guarantee of conditions or characteristics. with respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, infine on technologies hereby disclaims any and all warranties and liabilities of any kind, including witho ut limitation, warranties of non-infrin gement of intellectua l property rights of any third party. information for further information on technology, delivery terms and conditions and prices, please contact the nearest infineon technologies office ( www.infineon.com ). warnings due to technical requirements, components may contain dangerous substances. for information on the types in question, please contact the nearest infineon technologies office. infineon technologies compon ents may be used in life-su pport devices or systems only with the express written approval of infineon technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safe ty or effectiveness of that de vice or system. life support devices or systems are intended to be implanted in the hu man body or to support an d/or maintain and sustain and/or protect human life. if they fail, it is reasonable to assume that the health of the user or other persons may be endangered.

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